The following table is derived from the ROMREV program on the second 9845B/C System Exerciser Rev. E tape. It shows the part numbers, a short content description, a revision number, the systems they belong to, the number of 10K-ROMs that belong to a complete set, a checksum, the memory address and the memory block where the ROM data is located, and a download link for the ROM data if it has already been dumped.
The system information is encoded as follows:
B = 9845B with standard monochrome graphics option
T = 9845B with fast monochrome graphics option
C = 9845C with color graphics
Std. LPU = standard hybrid LPU
Fast LPU = bit slice LPU
Note that the address information and the block ID are both in octal notation. 10K (octal) stands for 8 kWords or 16 kBytes decimal. The checksum is always a decimal integer between -32768 and +32767.
- The System LPU ROM Rev. A has the ROM chips with the part numbers 1818-0823 and 1818-0827. It can be used with any standard LPU system. Each system ROM has 10K, so one complete set consists of two 5K-ROM chips. The address space for this ROM set starts at 0K of block 3 (the LPU system ROM block) and ends at the octal word address 17777 of the same block. The first 10K have a checksum of -31763 and the second 10K have a checksum of 20277.
The above OS ROMs can be downloaded here as complete archive: 9845-OS-ROM-Readouts-081019.zip
Different ROM sets are available for several HP9845 configurations. Each ROM set covers one complete CPU firmware. Each system needs two ROM sets, one for the LPU and one for the PPU. The following sets are provided for the most common configurations, all with complete firmware disassemblies. Please combine the appropriate LPU ROM set with the proper PPU ROM set, depending on your configuration:
|System firmware disassemblies with cross reference, hexdump and string analysis for 4 selected system configurations and two keyboard layouts (U.S. and German). Including firmware object code:||System-ROM-listings.zip|
In case you like to do a code analysis:
After power-up or CONTROL-STOP both processors start executing at address hex 20 (octal 40) in the PPU ROM block (block 5), which in general is an indirect jump to the initialization routine at address hex 200 (octal 400) where LPU and PPU first check for RAM presence at address hex FFFE and then each branches into its own firmware code. Branching is performed for the 9845B/C depending on the HLT signal (which is grounded on the LPU and driven by vertical retrace on the PPU) utilizing the SHC instruction.
Actually, the indirect jump is located at address hex 21 (octal 41). First an (either invalid or undocumented) hybrid processor instruction with op code hex 7A65 (octal 75145) is executed.
Whereas the PPU continues executing with an indirect jump over vector hex 10C to address hex 7A1E in the PPU firmware, the LPU switches to the LPU firmware at ROM block 3 and continues execution there with a jump to the LPU initialization routine at address hex 200. Here the PPU RAM (block 1) is selected for base page access and being checked for presence before an indirect jump via vector hex 160 to address hex 3CCF in the LPU firmware is performed.
Note: The ROM space below hex 20 is unused (overlaps with processor registers) and the address range from hex 22 to hex 200 is used for constants (frequently used numbers and OS vectors).
All the 9835A/B ROMs (both the operating system ROMs and the option ROMs) are provided as pluggable ROM modules. Note the address 'hole' between 10K and 30K, which was filled by the Mass Storage Option ROMs.
*The relation between the part number and the ROM is only estimated, since there is currently no product data available on the 9835 ROMs.
The above OS ROMs can be downloaded here as complete archive: 9835-OS-ROM-Readouts-090627.zip
Like the 9835 ROMs, all the 9845A ROMs (both the operating system ROMs and the option ROMs) are provided as pluggable ROM modules. The ROM drawer of the 9845A is different than that of the 9845B/C, and both types can't be exchanged.
Like the 9835A/B OS ROMs the 9845A ROMs do their own address decoding. Please note that the address space leaves some 'holes' for option ROMs (Mass Storage ROM and I/O PPU ROM for PPU block 1). The address hole in the LPU block actually isn't used by any of the released 9845A option ROMs.
|09845-65540-43||SYSTEM PPU 1-4||A||n/a||0-67777 1)||1|
|09845-65544-47||SYSTEM LPU 1-4||A||n/a||0-77777 2)||3|
1) Option ROM hole between octal 46000 and 65777. Dump includes Mass Storage ROM at 46000-57777 and I/O PPU Option ROM at 60000-65777.
2) Option ROM hole between octal 70000 and 75777.
PDS 45 from International Electronic Machinary (IEM) is a program development environment for the HP 9845 desktop computer. It provides the ability to write programs in a multi-language environment by supplying a toolset totally independent from the BASIC environment of the HP desktop computer systems. With the first release of the PDS 45 package in 1980, Pascal and 9845 assembler were supported, later support for FORTRAN77 was added.
Here are the main features of the PDS 45 system:
- An interactive disc-based operating system with file handling capabilities, run-time support routines, and block I/O service routines.
- A fast, one-pass Pascal compiler.
- A powerful, screen-oriented editor that runs in both program-editing and general document-editing modes.
- A file handler to manipulate disc files and volumes.
- A linker for link-editing separately compiled programs, and for linking language-independent libraries into user programs.
PDS 45 was distributed by Hewlett-Packard under the HP PLUS program.